Difference between revisions of "User workshop 2012"

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===Program===
 
===Program===
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* Introduction [15 minutes]
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* Highlighting of some recent contributions [30 minutes]
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{| class="wikitable" width="75%" style="margin: 1em auto 1em auto"
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* Solicited presentations (short in-depth presentations requested by attendees before conference) [1 hour]
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* User Perspectives (~12 short presentations about what you/group/company/etc are using gem5 for, any features you've added that the community should be aware of, what are the major pain points you experience, and what can be done to make gem5 better) [3 hours]
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! width="250"|Topic !! width="50"|Time !! width="100"|Presenter !! width="30"|Affiliation
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* Break-out sessions on progressing identified pain points [1.5 hours]
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* Wrap-up and next steps [45 minutes]
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| Introduction || style="text-align:right"|8:30 AM || Ali Saidi || ARM
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|-
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| Recent Contributions ||  ||  ||
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|-
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| Memory System Enhancements || style="text-align:right"|8:45 AM || Andreas Hannson || ARM
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|-
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| Visualizing stats via Streamline || style="text-align:right"|9:05 AM || Dam Sunwoo || ARM
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|-
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| User Perspectives ||  ||  ||
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|-
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| HAsim:  FPGA-Based Micro-Architecture Simulator || style="text-align:right"|9:20 AM || Michael Adler || Intel
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|-
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| VLIW DSPs/MIPS FS mode || style="text-align:right"|9:35 AM || Deyuan Guo and Hu He || Tsinghua Univ.
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|-
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| Eclipse Integration || style="text-align:right"|9:50 AM || Deyuan Guo and Hu He || Tsinghua Univ.
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|-
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| Cross-Cutting Infrastructure for Evaluating Managed Architectures and Future Languages || style="text-align:right"|10:05 AM || Paul Gratz || Texas A&M Univ.
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|-
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| Break || style="text-align:right"|10:20 AM ||  ||
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|-
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| Full-System Workloads and Asymmetric Multi-Core Simulation || style="text-align:right"|10:35 AM || Anthony Gutierrez || Univ. of Michigan
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|-
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| ARM SoC exploration || style="text-align:right"|10:50 AM || Alexandre Romana and Abhilash Nair || Texas Instruments
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|-
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| SystemC integration || style="text-align:right"|11:05 AM || Alexandre Romana and Abhilash Nair || Texas Instruments
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|-
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| Composite Cores || style="text-align:right"|11:20 AM || Shruti Padmanabha and Andrew Lukefahr || Univ. of Michigan
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|-
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| Customized InOrder CPU Modeling || style="text-align:right"|11:35 AM || Korey Sewell ||  Univ. of Michigan (now at Qualcomm)
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| Lunch || style="text-align:right"|12:00 PM ||  ||
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|-
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| Simplifying SLICC via Atomic Messages || style="text-align:right"|1:30 PM || Brad Beckmann || AMD
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|-
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| Accelerating Simulation with Virtual Machines || style="text-align:right"|1:45 PM || Ali Saidi || ARM
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|-
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| gem5-fusion: A Simulator for Heterogeneous Processors || style="text-align:right"|2:00 PM || Jason Power and Marc Orr || Univ. of Wisconsin-Madison
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|-
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| Breakout Sessions || style="text-align:right"|2:15 PM ||  ||
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|-
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| Wrap-Up/Actions from Breakout Sessions || style="text-align:right"|3:30 PM || Everyone ||
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|-
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| Conclusions || style="text-align:right"|4:00 PM || Steve Reinhardt || AMD
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|}
  
 
===Location===
 
===Location===

Revision as of 00:53, 11 November 2012

First Annual gem5 User Workshop
December 2012; Vancouver, BC


The primary objective of this workshop is to bring together groups across the community who are actively using gem5, discuss what is going on in the gem5 community, how we can best leverage each others contributions, and how we continue to make gem5 a successful community-supported simulation framework. Those who will get the most out of the conference are current users of gem5, although anyone is welcome to attend.

Program

Topic Time Presenter Affiliation
Introduction 8:30 AM Ali Saidi ARM
Recent Contributions
Memory System Enhancements 8:45 AM Andreas Hannson ARM
Visualizing stats via Streamline 9:05 AM Dam Sunwoo ARM
User Perspectives
HAsim: FPGA-Based Micro-Architecture Simulator 9:20 AM Michael Adler Intel
VLIW DSPs/MIPS FS mode 9:35 AM Deyuan Guo and Hu He Tsinghua Univ.
Eclipse Integration 9:50 AM Deyuan Guo and Hu He Tsinghua Univ.
Cross-Cutting Infrastructure for Evaluating Managed Architectures and Future Languages 10:05 AM Paul Gratz Texas A&M Univ.
Break 10:20 AM
Full-System Workloads and Asymmetric Multi-Core Simulation 10:35 AM Anthony Gutierrez Univ. of Michigan
ARM SoC exploration 10:50 AM Alexandre Romana and Abhilash Nair Texas Instruments
SystemC integration 11:05 AM Alexandre Romana and Abhilash Nair Texas Instruments
Composite Cores 11:20 AM Shruti Padmanabha and Andrew Lukefahr Univ. of Michigan
Customized InOrder CPU Modeling 11:35 AM Korey Sewell Univ. of Michigan (now at Qualcomm)
Lunch 12:00 PM
Simplifying SLICC via Atomic Messages 1:30 PM Brad Beckmann AMD
Accelerating Simulation with Virtual Machines 1:45 PM Ali Saidi ARM
gem5-fusion: A Simulator for Heterogeneous Processors 2:00 PM Jason Power and Marc Orr Univ. of Wisconsin-Madison
Breakout Sessions 2:15 PM
Wrap-Up/Actions from Breakout Sessions 3:30 PM Everyone
Conclusions 4:00 PM Steve Reinhardt AMD

Location

The workshop is co-located with MICRO-45 in Vancouver, BC.

Call for Presentations

As part of the workshop we plan to have a set of presentations from the community about how individuals or groups are using the simulator, any features you've added that might be useful to others, any major pain points, and what can be done to make gem5 better. The hope is that this will provide a forum for people with similar uses or needs to connect with each other. If you would like to give a short presentation (~15 minutes) please send a short (few paragraphs) abstract to workshop2012@gem5.org by October 15th, 2012.

Additionally, we plan to dedicate one hour of the workshop for senior gem5 developers to address particular issues or questions in depth. If you would like to suggest a topic for one of these presentations please email workshop2012@gem5.org.

Date

Sunday December 2nd from 8:30 - 16:30.

Early Registration

The early registration deadline is October 31st. Please register before then.


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