Difference between revisions of "ASPLOS2017 tutorial"
(→Abstract) |
m (→Slides) |
||
(5 intermediate revisions by 2 users not shown) | |||
Line 11: | Line 11: | ||
The primary audience is junior computer architecture engineers (e.g., first or second year graduate students, as well as junior engineers) who are planning on using gem5 for future architecture research. We also invite others who want a high-level idea of how gem5 works and its applicability to architecture research. | The primary audience is junior computer architecture engineers (e.g., first or second year graduate students, as well as junior engineers) who are planning on using gem5 for future architecture research. We also invite others who want a high-level idea of how gem5 works and its applicability to architecture research. | ||
− | The tutorial is free to attend (no registration fee required), registration is required. | + | The tutorial is free to attend (no registration fee required), registration is required via ASPLOS. |
Prerequisites: Attendees are expected to have a working knowledge of C++, Python, and computer systems. | Prerequisites: Attendees are expected to have a working knowledge of C++, Python, and computer systems. | ||
+ | |||
+ | =Slides= | ||
+ | The slides from the tutorial can be downloaded [[:file:ASPLOS2017_gem5_tutorial.pdf|here]]. | ||
= Schedule = | = Schedule = | ||
Line 24: | Line 27: | ||
! width="50"|Time | ! width="50"|Time | ||
|- | |- | ||
− | | Introduction || style="text-align:right"|13:00-13: | + | | Introduction || style="text-align:right"|13:00-13:10 |
+ | |- | ||
+ | | Getting started with gem5 || style="text-align:right"|13:10-13:30 | ||
+ | |- | ||
+ | | Advanced configurations || style="text-align:right"|13:30-13:55 | ||
|- | |- | ||
− | | | + | | Debug & Trace || style="text-align:right"|13:55-14:05 |
|- | |- | ||
− | | | + | | Creating SimObjects || style="text-align:right"|14:05-14:30 |
|- | |- | ||
|- style="background:lightgray" | |- style="background:lightgray" | ||
Line 35: | Line 42: | ||
| Introduction to memory subsystems || style="text-align:right"|15:00-15:45 | | Introduction to memory subsystems || style="text-align:right"|15:00-15:45 | ||
|- | |- | ||
− | |Advanced gem5 features and capabilities || style="text-align:right"| | + | | Introduction to CPU models || style="text-align:right"|15:45-16:10 |
+ | |- | ||
+ | |Advanced gem5 features and capabilities || style="text-align:right"|16:10-16:40 | ||
|- | |- | ||
− | |How to contribute to gem5 || style="text-align:right"|16: | + | |How to contribute to gem5 || style="text-align:right"|16:40-17:00 |
|} | |} | ||
Latest revision as of 06:20, 19 April 2017
Architectural Exploration with gem5
Abstract
This tutorial will give a brief introduction to gem5 for computer engineers who are new to gem5. The attendees will learn what gem5 can and can not do, how to use and extend gem5, as well as how to contribute back to gem5.
Target Audience
The primary audience is junior computer architecture engineers (e.g., first or second year graduate students, as well as junior engineers) who are planning on using gem5 for future architecture research. We also invite others who want a high-level idea of how gem5 works and its applicability to architecture research.
The tutorial is free to attend (no registration fee required), registration is required via ASPLOS.
Prerequisites: Attendees are expected to have a working knowledge of C++, Python, and computer systems.
Slides
The slides from the tutorial can be downloaded here.
Schedule
The tutorial is scheduled on the Sunday afternoon 9th April 2017 at The Westin Xi'an hotel.
Topic | Time |
---|---|
Introduction | 13:00-13:10 |
Getting started with gem5 | 13:10-13:30 |
Advanced configurations | 13:30-13:55 |
Debug & Trace | 13:55-14:05 |
Creating SimObjects | 14:05-14:30 |
Break | 14:30-15:00 |
Introduction to memory subsystems | 15:00-15:45 |
Introduction to CPU models | 15:45-16:10 |
Advanced gem5 features and capabilities | 16:10-16:40 |
How to contribute to gem5 | 16:40-17:00 |
Presenters
This tutorial is organised by Andreas Sandberg, Stephan Diestelhorst and William Wang of ARM Research