Difference between revisions of "Status Matrix"
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== Notes == | == Notes == | ||
− | Below [[Classic Memory System | Classic]] and [[Ruby]] refers to the two memory systems that we have in gem5. [[MI_example|MI]], [[MESI | + | Below [[Classic Memory System | Classic]] and [[Ruby]] refers to the two memory systems that we have in gem5. [[MI_example|MI]], [[MESI Two Level | MESI]] and [[Ruby#SLICC + Coherence protocols: | MOESI]] (multiple flavors) are the coherence protocols that are supported in Ruby memory system. Then we have the CPU models: [[SimpleCPU | AtomicSimple]], [[SimpleCPU | TimingSimple]], [[InOrder]] and [[O3CPU | O3]]. |
Numbers in the squares below refer to the following notes: | Numbers in the squares below refer to the following notes: | ||
Line 25: | Line 25: | ||
== ISA Support Matrices == | == ISA Support Matrices == | ||
+ | |||
+ | '''''THIS PAGE WAS LAST UPDATED IN 2015. IT IS LIKELY OUT OF DATE. USE THIS AS A GUIDELINE.''''' | ||
=== Alpha === | === Alpha === | ||
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|} | |} | ||
− | === | + | === ARM === |
{| border="1" class="wikitable" align=center style="background:#B0C4DE;" | {| border="1" class="wikitable" align=center style="background:#B0C4DE;" | ||
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!rowspan="2"|SE | !rowspan="2"|SE | ||
|uni | |uni | ||
− | | style="background: | + | | style="background: green; color: white" | |
| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
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|- | |- | ||
|multi | |multi | ||
− | | style="background: | + | | style="background: green; color: white" | |
| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
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!rowspan="2"|FS | !rowspan="2"|FS | ||
|uni | |uni | ||
− | | style="background: | + | | style="background: green; color: white" | |
| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
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|- | |- | ||
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| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
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|- | |- | ||
!rowspan="4"|TimingSimple | !rowspan="4"|TimingSimple | ||
− | !rowspan="2"|SE | + | !rowspan="2"|SE |
|uni | |uni | ||
− | | style="background: | + | | style="background: green; color: white" | |
− | | style="background: | + | | style="background: orange; color: white"| |
− | | style="background: | + | | style="background: orange; color: white"| |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
|- | |- | ||
|multi | |multi | ||
− | | style="background: | + | | style="background: green; color: white" | |
− | | style="background: | + | | style="background: red; color: white"| Note 2 |
− | | style="background: | + | | style="background: orange; color: white"| |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
|uni | |uni | ||
− | |||
− | |||
− | |||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: | + | | style="background: orange; color: white"| |
− | | style="background: | + | | style="background: orange; color: white"| |
+ | | style="background: orange; color: white" | | ||
+ | | style="background: orange; color: white" | | ||
+ | | style="background: orange; color: white" | | ||
|- | |- | ||
|multi | |multi | ||
− | | style="background: | + | | style="background: green; color: white" | |
− | | style="background: | + | | style="background: red; color: white"| Note 2 |
− | | style="background: | + | | style="background: orange; color: white"| |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
|- | |- | ||
!rowspan="4"|InOrder | !rowspan="4"|InOrder | ||
!rowspan="2"|SE | !rowspan="2"|SE | ||
|uni | |uni | ||
− | | style="background: | + | | style="background: green; color: white" | |
| style="background: red; color: white" | | | style="background: red; color: white" | | ||
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| style="background: red; color: white" | | | style="background: red; color: white" | | ||
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!rowspan="2"|FS | !rowspan="2"|FS | ||
|uni | |uni | ||
− | | style="background: | + | | style="background: green; color: white" | |
| style="background: red; color: white" | | | style="background: red; color: white" | | ||
| style="background: red; color: white" | | | style="background: red; color: white" | | ||
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|multi | |multi | ||
− | | style="background: | + | | style="background: green; color: white" | |
| style="background: red; color: white" | | | style="background: red; color: white" | | ||
| style="background: red; color: white" | | | style="background: red; color: white" | | ||
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|- | |- | ||
!rowspan="4"|O3 | !rowspan="4"|O3 | ||
− | !rowspan="2"|SE | + | !rowspan="2"|SE |
|uni | |uni | ||
− | | style="background: | + | | style="background: green; color: white" | |
− | | style="background: | + | | style="background: orange; color: white"| |
− | | style="background: | + | | style="background: orange; color: white"| |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
|- | |- | ||
|multi | |multi | ||
− | | style="background: | + | | style="background: green; color: white" | |
− | | style="background: red; color: white" | Note 2 | + | | style="background: red; color: white"| Note 2 |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
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|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
|uni | |uni | ||
− | | style="background: | + | | style="background: green; color: white" | |
− | | style="background: red; color: white" | Note 2 | + | | style="background: red; color: white"| Note 2 |
− | | style="background: | + | | style="background: orange; color: white"| |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
|- | |- | ||
|multi | |multi | ||
− | | style="background: | + | | style="background: green; color: white" | |
− | | style="background: red; color: white" | Note 2 | + | | style="background: red; color: white"| Note 2 |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
− | | style="background: | + | | style="background: orange; color: white" | |
|- | |- | ||
|} | |} | ||
− | === | + | === x86 === |
{| border="1" class="wikitable" align=center style="background:#B0C4DE;" | {| border="1" class="wikitable" align=center style="background:#B0C4DE;" | ||
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|uni | |uni | ||
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| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
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| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
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|uni | |uni | ||
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| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
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|multi | |multi | ||
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| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
| style="background: red; color: white" | Note 1 | | style="background: red; color: white" | Note 1 | ||
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!rowspan="4"|TimingSimple | !rowspan="4"|TimingSimple | ||
− | !rowspan="2"|SE | + | !rowspan="2"|SE |
|uni | |uni | ||
− | | style="background: | + | | style="background: yellow;" | |
− | | style="background: | + | | style="background: yellow;" | |
− | | style="background: | + | | style="background: yellow;" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
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|- | |- | ||
|multi | |multi | ||
− | | style="background: | + | | style="background: yellow;" | Note 3 |
− | | style="background: | + | | style="background: yellow;" | |
− | | style="background: | + | | style="background: yellow;" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow;" | |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
|uni | |uni | ||
+ | | style="background: yellow;" | Note 3 | ||
+ | | style="background: yellow;" | | ||
+ | | style="background: yellow;" | | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow;" | |
− | |||
− | |||
− | |||
|- | |- | ||
|multi | |multi | ||
− | | style="background: | + | | style="background: yellow;" | Note 3 |
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− | | style="background: | + | | style="background: green; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
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|- | |- | ||
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− | !rowspan="2"|SE | + | !rowspan="2"|SE |
|uni | |uni | ||
− | | style="background: | + | | style="background: yellow;" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
|- | |- | ||
|multi | |multi | ||
− | | style="background: | + | | style="background: yellow;" | Note 3 |
− | | style="background: red; color: white"| Note 2 | + | | style="background: red; color: white" | Note 2 |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
|uni | |uni | ||
− | | style="background: | + | | style="background: orange; color: white" | Note 3 |
− | | style="background: red; color: white"| Note 2 | + | | style="background: red; color: white" | Note 2 |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
|- | |- | ||
|multi | |multi | ||
− | | style="background: | + | | style="background: orange; color: white" | Note 3 |
− | | style="background: red; color: white"| Note 2 | + | | style="background: red; color: white" | Note 2 |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
− | | style="background: | + | | style="background: yellow; color: white" | |
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|} | |} | ||
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| style="background: purple; color: white"| | | style="background: purple; color: white"| | ||
| style="background: purple; color: white"| | | style="background: purple; color: white"| | ||
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| style="background: purple; color: white"| | | style="background: purple; color: white"| |
Latest revision as of 12:06, 23 February 2018
The follow six tables describe the current state of component combinations in gem5.
Contents
Color Key
Definitely does not work |
Might work |
Should work |
Definitely works |
Unknown |
Notes
Below Classic and Ruby refers to the two memory systems that we have in gem5. MI, MESI and MOESI (multiple flavors) are the coherence protocols that are supported in Ruby memory system. Then we have the CPU models: AtomicSimple, TimingSimple, InOrder and O3.
Numbers in the squares below refer to the following notes:
- Ruby does not support atomic-mode accesses
- The MI_example protocol cannot support LL/SC semantics
- Classic caches do not support x86 locked (atomic RMW) accesses. The AtomicSimple CPU model enforces atomic RMW accesses itself, so this only affects correctness for timing-mode CPU models.
ISA Support Matrices
THIS PAGE WAS LAST UPDATED IN 2015. IT IS LIKELY OUT OF DATE. USE THIS AS A GUIDELINE.
Alpha
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Model | System | Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
AtomicSimple | SE | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
TimingSimple | SE | uni | ||||||
multi | Note 2 | |||||||
FS | uni | |||||||
multi | Note 2 | |||||||
InOrder | SE | uni | ||||||
multi | Note 2 | |||||||
FS | uni | |||||||
multi | Note 2 | |||||||
O3 | SE | uni | ||||||
multi | Note 2 | |||||||
FS | uni | |||||||
multi | Note 2 |
ARM
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Model | System | Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
AtomicSimple | SE | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
TimingSimple | SE | uni | ||||||
multi | Note 2 | |||||||
FS | uni | |||||||
multi | Note 2 | |||||||
InOrder | SE | uni | ||||||
multi | ||||||||
FS | uni | |||||||
multi | ||||||||
O3 | SE | uni | ||||||
multi | Note 2 | |||||||
FS | uni | Note 2 | ||||||
multi | Note 2 |
x86
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Model | System | Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
AtomicSimple | SE | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
TimingSimple | SE | uni | ||||||
multi | Note 3 | |||||||
FS | uni | Note 3 | ||||||
multi | Note 3 | |||||||
InOrder | SE | uni | ||||||
multi | ||||||||
FS | uni | |||||||
multi | ||||||||
O3 | SE | uni | ||||||
multi | Note 3 | Note 2 | ||||||
FS | uni | Note 3 | Note 2 | |||||
multi | Note 3 | Note 2 |
SPARC
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Model | System | Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
AtomicSimple | SE | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
TimingSimple | SE | uni | ||||||
multi | ||||||||
FS | uni | |||||||
multi | ||||||||
InOrder | SE | uni | ||||||
multi | ||||||||
FS | uni | |||||||
multi | ||||||||
O3 | SE | uni | ||||||
multi | Note 2 | |||||||
FS | uni | |||||||
multi | Note 2 |
PowerPC
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Model | System | Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
AtomicSimple | SE | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
TimingSimple | SE | uni | ||||||
multi | ||||||||
FS | uni | |||||||
multi | ||||||||
InOrder | SE | uni | ||||||
multi | ||||||||
FS | uni | |||||||
multi | ||||||||
O3 | SE | uni | ||||||
multi | Note 2 | |||||||
FS | uni | |||||||
multi | Note 2 |
MIPS
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Model | System | Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
AtomicSimple | SE | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uni | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multi | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
TimingSimple | SE | uni | ||||||
multi | ||||||||
FS | uni | |||||||
multi | ||||||||
InOrder | SE | uni | ||||||
multi | ||||||||
FS | uni | |||||||
multi | ||||||||
O3 | SE | uni | ||||||
multi | Note 2 | |||||||
FS | uni | |||||||
multi | Note 2 |