Difference between revisions of "Google Summer of Code"
From gem5
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# Sampling/fast-forwarding techniques | # Sampling/fast-forwarding techniques | ||
#* This would have the most impact if it was coupled with (1) | #* This would have the most impact if it was coupled with (1) | ||
| + | #* Using SMARTS work would be a good guide | ||
# Flash memory device model (seems popular nowadays) | # Flash memory device model (seems popular nowadays) | ||
#* This could be a hard drive based model like we're seeing in laptops now or a memory device model like several research papers have suggested as storage in between DRAM and disk. | #* This could be a hard drive based model like we're seeing in laptops now or a memory device model like several research papers have suggested as storage in between DRAM and disk. | ||
Revision as of 19:22, 11 March 2008
All the ideas listed here will require some familiarity with Python and a good grasp of advanced C++ concepts.
- Build a direct execution CPU model based on the Linux Kernel Virtual Machine
- Parallelize M5
- Use the Wisconsin Wind Tunnel as a guide
- This actually isn't as bad as it sounds as all objects schedule their own events and there are limited ways they can interact with other objects in the system.
- Memory network models
- (e.g. Crossbar or Mesh)
- Directory Protocol
- Real In-order core model
- Kevin has one that works to some degree in SE, it doesn't have functional units yet, but it does have variable latency stages and such
- Korey has one he did at MIPS, I don't know about it's features, but it's SE only as well
- Write a PLI interface to connect Verilog CPUs to the memory system.
- Sampling/fast-forwarding techniques
- This would have the most impact if it was coupled with (1)
- Using SMARTS work would be a good guide
- Flash memory device model (seems popular nowadays)
- This could be a hard drive based model like we're seeing in laptops now or a memory device model like several research papers have suggested as storage in between DRAM and disk.
