Difference between revisions of "Status Matrix"
From gem5
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(→x86) |
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=== x86 === | === x86 === | ||
+ | |||
+ | http://m5sim.org/wiki/index.php/x86_Status_Matrix | ||
=== ARM === | === ARM === |
Revision as of 17:03, 28 February 2011
Alpha
http://m5sim.org/wiki/index.php/Alpha_Status_Matrix
x86
http://m5sim.org/wiki/index.php/x86_Status_Matrix
ARM
SPARC
PowerPC
MIPS
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Cpu Model | System | Processor Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
Atomic | SE | uniprocessor | ||||||
mulitprocessor | ||||||||
FS | uniprocessor | |||||||
mulitprocessor | ||||||||
TimingSimple | SE | uniprocessor | ||||||
mulitprocessor | ||||||||
FS | uniprocessor | |||||||
mulitprocessor | ||||||||
In-Order | SE | uniprocessor | ||||||
mulitprocessor | ||||||||
FS | uniprocessor | |||||||
mulitprocessor | ||||||||
o3 | SE | uniprocessor | ||||||
mulitprocessor | ||||||||
FS | uniprocessor | |||||||
mulitprocessor |