Difference between revisions of "Status Matrix"

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(→‎ARM)
(→‎SPARC)
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=== SPARC ===
 
=== SPARC ===
  
−
http://m5sim.org/wiki/index.php/SPARC_Status_Matrix
+
{| border="1"
 +
!colspan="3"|Processor
 +
!colspan="6"|Memory System
 +
|-
 +
!rowspan="2"|Cpu Model
 +
!rowspan="2"|System
 +
!rowspan="2"|Processor Count
 +
!rowspan="2"|Classic
 +
!colspan="5"|Ruby
 +
|-
 +
|MI_example||MOESI_hammer||MESI_CMP_directory||MOESI_CMP_directory||MOESI_CMP_token
 +
|-
 +
!rowspan="4"|Atomic
 +
!rowspan="2"|SE
 +
|uniprocessor
 +
|-
 +
|mulitprocessor
 +
|-
 +
!rowspan="2"|FS
 +
|uniprocessor
 +
|-
 +
|mulitprocessor
 +
|-
 +
!rowspan="4"|TimingSimple
 +
!rowspan="2"|SE
 +
|uniprocessor
 +
|-
 +
|mulitprocessor
 +
|-
 +
!rowspan="2"|FS
 +
|uniprocessor
 +
|-
 +
|mulitprocessor
 +
|-
 +
!rowspan="4"|In-Order
 +
!rowspan="2"|SE
 +
|uniprocessor
 +
|-
 +
|mulitprocessor
 +
|-
 +
!rowspan="2"|FS
 +
|uniprocessor
 +
|-
 +
|mulitprocessor
 +
|-
 +
!rowspan="4"|o3
 +
!rowspan="2"|SE
 +
|uniprocessor
 +
|-
 +
|mulitprocessor
 +
|-
 +
!rowspan="2"|FS
 +
|uniprocessor
 +
|-
 +
|mulitprocessor
 +
|-
 +
|}
  
 
=== PowerPC ===
 
=== PowerPC ===

Revision as of 17:05, 28 February 2011

Alpha

Processor Memory System
Cpu Model System Processor Count Classic Ruby
MI_example MOESI_hammer MESI_CMP_directory MOESI_CMP_directory MOESI_CMP_token
Atomic SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
TimingSimple SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
In-Order SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
o3 SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor

x86

Processor Memory System
Cpu Model System Processor Count Classic Ruby
MI_example MOESI_hammer MESI_CMP_directory MOESI_CMP_directory MOESI_CMP_token
Atomic SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
TimingSimple SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
In-Order SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
o3 SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor

ARM

Processor Memory System
Cpu Model System Processor Count Classic Ruby
MI_example MOESI_hammer MESI_CMP_directory MOESI_CMP_directory MOESI_CMP_token
Atomic SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
TimingSimple SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
In-Order SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
o3 SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor

SPARC

Processor Memory System
Cpu Model System Processor Count Classic Ruby
MI_example MOESI_hammer MESI_CMP_directory MOESI_CMP_directory MOESI_CMP_token
Atomic SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
TimingSimple SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
In-Order SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
o3 SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor

PowerPC

http://m5sim.org/wiki/index.php/PowerPC_Status_Matrix

MIPS

http://m5sim.org/wiki/index.php/MIPS_Status_Matrix

Processor Memory System
Cpu Model System Processor Count Classic Ruby
MI_example MOESI_hammer MESI_CMP_directory MOESI_CMP_directory MOESI_CMP_token
Atomic SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
TimingSimple SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
In-Order SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
o3 SE uniprocessor
mulitprocessor
FS uniprocessor
mulitprocessor
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