Difference between revisions of "Status Matrix"
From gem5
(fix type in spelling of "multiprocessor") |
(Factor text out into numbered notes) |
||
Line 1: | Line 1: | ||
The follow six tables describe the current state of component combinations in gem5. | The follow six tables describe the current state of component combinations in gem5. | ||
− | + | == Color Key == | |
− | Color Key | ||
{| border="1" class="wikitable" | {| border="1" class="wikitable" | ||
| style="background: red; color: white" | Definitely does not work | | style="background: red; color: white" | Definitely does not work | ||
Line 15: | Line 14: | ||
|- | |- | ||
|} | |} | ||
+ | |||
+ | == Notes == | ||
+ | |||
+ | Numbers in the squares below refer to the following notes: | ||
+ | |||
+ | # Ruby does not support atomic-mode accesses | ||
+ | # The MI_example protocol cannot support LL/SC semantics | ||
+ | # Ruby does not support probing the O3 LSQ to enforce non-weak consistency models | ||
+ | # ARM MP does not support booting with caches, but works otherwise. You can boot without caches then switch to running with caches using either a checkpoint/resume or on-line CPU switchover. | ||
+ | |||
+ | == ISA Support Matrices == | ||
=== Alpha === | === Alpha === | ||
Line 34: | Line 44: | ||
|uniprocessor | |uniprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
|uniprocessor | |uniprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="4"|TimingSimple | !rowspan="4"|TimingSimple | ||
Line 77: | Line 87: | ||
|multiprocessor | |multiprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 2 |
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
| style="background: orange; color: white" | | | style="background: orange; color: white" | | ||
Line 94: | Line 104: | ||
|multiprocessor | |multiprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 2 |
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
| style="background: orange; color: white" | | | style="background: orange; color: white" | | ||
Line 112: | Line 122: | ||
|multiprocessor | |multiprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 2 |
| style="background: purple; color: white" | | | style="background: purple; color: white" | | ||
| style="background: purple; color: white" | | | style="background: purple; color: white" | | ||
Line 129: | Line 139: | ||
|multiprocessor | |multiprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 2 |
| style="background: purple; color: white" | | | style="background: purple; color: white" | | ||
| style="background: purple; color: white" | | | style="background: purple; color: white" | | ||
Line 147: | Line 157: | ||
|multiprocessor | |multiprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 2 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
Line 164: | Line 174: | ||
|multiprocessor | |multiprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 2 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
|} | |} | ||
Line 190: | Line 200: | ||
|uniprocessor | |uniprocessor | ||
| style="background: yellow;" | | | style="background: yellow;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
| style="background: yellow;" | | | style="background: yellow;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
|uniprocessor | |uniprocessor | ||
| style="background: yellow;" | | | style="background: yellow;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
| style="background: yellow;" | | | style="background: yellow;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="4"|TimingSimple | !rowspan="4"|TimingSimple | ||
Line 303: | Line 313: | ||
|multiprocessor | |multiprocessor | ||
| style="background: orange; color: white" | | | style="background: orange; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
Line 320: | Line 330: | ||
|multiprocessor | |multiprocessor | ||
| style="background: red; color: white" | | | style="background: red; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
|} | |} | ||
Line 346: | Line 356: | ||
|uniprocessor | |uniprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
|uniprocessor | |uniprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
− | | style="background: green; color: white" | | + | | style="background: green; color: white" | Note 4 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="4"|TimingSimple | !rowspan="4"|TimingSimple | ||
Line 389: | Line 399: | ||
|multiprocessor | |multiprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white"| | + | | style="background: red; color: white"| Note 2 |
| style="background: orange; color: white"| | | style="background: orange; color: white"| | ||
| style="background: orange; color: white" | | | style="background: orange; color: white" | | ||
Line 405: | Line 415: | ||
|- | |- | ||
|multiprocessor | |multiprocessor | ||
− | | style="background: green; color: white" | | + | | style="background: green; color: white" | Note 4 |
− | | style="background: red; color: white"| | + | | style="background: red; color: white"| Note 2 |
| style="background: orange; color: white"| | | style="background: orange; color: white"| | ||
| style="background: orange; color: white" | | | style="background: orange; color: white" | | ||
Line 459: | Line 469: | ||
|multiprocessor | |multiprocessor | ||
| style="background: green; color: white" | | | style="background: green; color: white" | | ||
− | | style="background: red; color: white"| | + | | style="background: red; color: white"| Note 2 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
Line 475: | Line 485: | ||
|- | |- | ||
|multiprocessor | |multiprocessor | ||
− | | style="background: green; color: white" | | + | | style="background: green; color: white" | Note 4 |
− | | style="background: red; color: white"| | + | | style="background: red; color: white"| Note 2 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
|} | |} | ||
− | |||
− | |||
=== SPARC === | === SPARC === | ||
Line 504: | Line 512: | ||
|uniprocessor | |uniprocessor | ||
| style="background: yellow;" | | | style="background: yellow;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
| style="background: yellow;" | | | style="background: yellow;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
|uniprocessor | |uniprocessor | ||
| style="background: orange; color: white" | | | style="background: orange; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
| style="background: red; color: white" | | | style="background: red; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="4"|TimingSimple | !rowspan="4"|TimingSimple | ||
Line 617: | Line 625: | ||
|multiprocessor | |multiprocessor | ||
| style="background: yellow; color: white" | | | style="background: yellow; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
Line 634: | Line 642: | ||
|multiprocessor | |multiprocessor | ||
| style="background: red; color: white" | | | style="background: red; color: white" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
|} | |} | ||
Line 660: | Line 668: | ||
|uniprocessor | |uniprocessor | ||
| style="background: yellow;" | | | style="background: yellow;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
| style="background: orange;" | | | style="background: orange;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
|uniprocessor | |uniprocessor | ||
| style="background: yellow;" | | | style="background: yellow;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
| style="background: orange;" | | | style="background: orange;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="4"|TimingSimple | !rowspan="4"|TimingSimple | ||
Line 773: | Line 781: | ||
|multiprocessor | |multiprocessor | ||
| style="background: orange;" | | | style="background: orange;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
Line 790: | Line 798: | ||
|multiprocessor | |multiprocessor | ||
| style="background: orange;" | | | style="background: orange;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
|} | |} | ||
Line 816: | Line 824: | ||
|uniprocessor | |uniprocessor | ||
| style="background: yellow;" | | | style="background: yellow;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
| style="background: orange;" | | | style="background: orange;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
|uniprocessor | |uniprocessor | ||
| style="background: yellow;" | | | style="background: yellow;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
|multiprocessor | |multiprocessor | ||
| style="background: orange;" | | | style="background: orange;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 1 |
|- | |- | ||
!rowspan="4"|TimingSimple | !rowspan="4"|TimingSimple | ||
Line 929: | Line 937: | ||
|multiprocessor | |multiprocessor | ||
| style="background: orange;" | | | style="background: orange;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
!rowspan="2"|FS | !rowspan="2"|FS | ||
Line 946: | Line 954: | ||
|multiprocessor | |multiprocessor | ||
| style="background: orange;" | | | style="background: orange;" | | ||
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
− | | style="background: red; color: white" | | + | | style="background: red; color: white" | Note 3 |
|- | |- | ||
|} | |} |
Revision as of 19:48, 18 September 2011
The follow six tables describe the current state of component combinations in gem5.
Contents
Color Key
Definitely does not work |
Might work |
Should work |
Definitely works |
Unknown |
Notes
Numbers in the squares below refer to the following notes:
- Ruby does not support atomic-mode accesses
- The MI_example protocol cannot support LL/SC semantics
- Ruby does not support probing the O3 LSQ to enforce non-weak consistency models
- ARM MP does not support booting with caches, but works otherwise. You can boot without caches then switch to running with caches using either a checkpoint/resume or on-line CPU switchover.
ISA Support Matrices
Alpha
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Cpu Model | System | Processor Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
Atomic | SE | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multiprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multiprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
TimingSimple | SE | uniprocessor | ||||||
multiprocessor | Note 2 | |||||||
FS | uniprocessor | |||||||
multiprocessor | Note 2 | |||||||
In-Order | SE | uniprocessor | ||||||
multiprocessor | Note 2 | |||||||
FS | uniprocessor | |||||||
multiprocessor | Note 2 | |||||||
o3 | SE | uniprocessor | ||||||
multiprocessor | Note 2 | Note 3 | Note 3 | Note 3 | Note 3 | |||
FS | uniprocessor | |||||||
multiprocessor | Note 2 | Note 3 | Note 3 | Note 3 | Note 3 |
x86
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Cpu Model | System | Processor Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
Atomic | SE | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multiprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multiprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
TimingSimple | SE | uniprocessor | ||||||
multiprocessor | ||||||||
FS | uniprocessor | |||||||
multiprocessor | ||||||||
In-Order | SE | uniprocessor | ||||||
multiprocessor | ||||||||
FS | uniprocessor | |||||||
multiprocessor | ||||||||
o3 | SE | uniprocessor | ||||||
multiprocessor | Note 3 | Note 3 | Note 3 | Note 3 | Note 3 | |||
FS | uniprocessor | |||||||
multiprocessor | Note 3 | Note 3 | Note 3 | Note 3 | Note 3 |
ARM
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Cpu Model | System | Processor Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
Atomic | SE | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multiprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multiprocessor | Note 4 | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
TimingSimple | SE | uniprocessor | ||||||
multiprocessor | Note 2 | |||||||
FS | uniprocessor | |||||||
multiprocessor | Note 4 | Note 2 | ||||||
In-Order | SE | uniprocessor | ||||||
multiprocessor | ||||||||
FS | uniprocessor | |||||||
multiprocessor | ||||||||
o3 | SE | uniprocessor | ||||||
multiprocessor | Note 2 | Note 3 | Note 3 | Note 3 | Note 3 | |||
FS | uniprocessor | |||||||
multiprocessor | Note 4 | Note 2 | Note 3 | Note 3 | Note 3 | Note 3 |
SPARC
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Cpu Model | System | Processor Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
Atomic | SE | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multiprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multiprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
TimingSimple | SE | uniprocessor | ||||||
multiprocessor | ||||||||
FS | uniprocessor | |||||||
multiprocessor | ||||||||
In-Order | SE | uniprocessor | ||||||
multiprocessor | ||||||||
FS | uniprocessor | |||||||
multiprocessor | ||||||||
o3 | SE | uniprocessor | ||||||
multiprocessor | Note 3 | Note 3 | Note 3 | Note 3 | Note 3 | |||
FS | uniprocessor | |||||||
multiprocessor | Note 3 | Note 3 | Note 3 | Note 3 | Note 3 |
PowerPC
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Cpu Model | System | Processor Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
Atomic | SE | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multiprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multiprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
TimingSimple | SE | uniprocessor | ||||||
multiprocessor | ||||||||
FS | uniprocessor | |||||||
multiprocessor | ||||||||
In-Order | SE | uniprocessor | ||||||
multiprocessor | ||||||||
FS | uniprocessor | |||||||
multiprocessor | ||||||||
o3 | SE | uniprocessor | ||||||
multiprocessor | Note 3 | Note 3 | Note 3 | Note 3 | Note 3 | |||
FS | uniprocessor | |||||||
multiprocessor | Note 3 | Note 3 | Note 3 | Note 3 | Note 3 |
MIPS
Processor | Memory System | |||||||
---|---|---|---|---|---|---|---|---|
Cpu Model | System | Processor Count | Classic | Ruby | ||||
MI_example | MOESI_hammer | MESI_CMP_directory | MOESI_CMP_directory | MOESI_CMP_token | ||||
Atomic | SE | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |
multiprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
FS | uniprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | ||
multiprocessor | Note 1 | Note 1 | Note 1 | Note 1 | Note 1 | |||
TimingSimple | SE | uniprocessor | ||||||
multiprocessor | ||||||||
FS | uniprocessor | |||||||
multiprocessor | ||||||||
In-Order | SE | uniprocessor | ||||||
multiprocessor | ||||||||
FS | uniprocessor | |||||||
multiprocessor | ||||||||
o3 | SE | uniprocessor | ||||||
multiprocessor | Note 3 | Note 3 | Note 3 | Note 3 | Note 3 | |||
FS | uniprocessor | |||||||
multiprocessor | Note 3 | Note 3 | Note 3 | Note 3 | Note 3 |