Difference between revisions of "X86 microop ISA"

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(→‎Register Ops)
(→‎Register Ops)
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Subtracts the contents of the Src2 register from the Src1 register and puts the result in the Dest register.
 
Subtracts the contents of the Src2 register from the Src1 register and puts the result in the Dest register.
  
−
=== subi: Dest = Src1 + Imm ===
+
=== subi: Dest = Src1 - Imm ===
−
Subtracts the contents of the Src1 register and the immediate Imm and puts the result in the Dest register.
+
Subtracts the contents of the immediate Imm from the Src1 register and puts the result in the Dest register.
  
 
=== Flags ===
 
=== Flags ===
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== Sbb ==
 
== Sbb ==
 +
 +
=== sbb: Dest = Src1 - Src2 - CF ===
 +
Subtracts the contents of the Src2 register and the carry flag from the Src1 register and puts the result in the Dest register.
 +
 +
=== sbbi: Dest = Src1 - Imm - CF ===
 +
Subtracts the immediate Imm and the carry flag from the Src1 register and puts the result in the Dest register.
 +
 +
=== Flags ===
 +
This microop optionally sets the CF, ECF, ZF, EZF, PF, AF, SF, and OF flags.
 +
 +
<table>
 +
  <tr>
 +
    <td> <b>CF and ECF</b> </td><td>The barrow into of the most significant bit.</td>
 +
  </tr>
 +
  <tr>
 +
    <td> <b>ZF and EZF</b> </td><td>Whether the result was zero.</td>
 +
  </tr>
 +
  <tr>
 +
    <td> <b>PF</b> </td><td> The parity of the result. </td>
 +
  </tr>
 +
  <tr>
 +
    <td> <b>AF</b> </td><td> The barrow from the 5th to 4th bit positions. </td>
 +
  </tr>
 +
  <tr>
 +
    <td> <b>SF</b> </td><td> The sign of the result. </td>
 +
  </tr>
 +
  <tr>
 +
    <td> <b>OF</b> </td><td> Whether there was an overflow. </td>
 +
  </tr>
 +
</table>
  
 
== Mul1s ==
 
== Mul1s ==
 +
 +
=== mul1s: ProdHi:ProdLo = Src1 * Src2 ===
 +
Multiplies the unsigned contents of the Src1 and Src2 registers and puts the high and low portions of the product into the internal registers ProdHi and ProdLo, respectively.
 +
 +
=== mul1si: ProdHi:ProdLo = Src1 * Imm ===
 +
Multiplies the unsigned contents of the Src1 register and the immediate Imm and puts the high and low portions of the product into the internal registers ProdHi and ProdLo, respectively.
 +
 +
=== Flags ===
 +
This microop does not currently set any flags. It will be able to in the future.
  
 
== Mul1u ==
 
== Mul1u ==
 +
 +
=== mul1u: ProdHi:ProdLo = Src1 * Src2 ===
 +
Multiplies the unsigned contents of the Src1 and Src2 registers and puts the high and low portions of the product into the internal registers ProdHi and ProdLo, respectively.
 +
 +
=== mul1ui: ProdHi:ProdLo = Src1 * Imm ===
 +
Multiplies the unsigned contents of the Src1 register and the immediate Imm and puts the high and low portions of the product into the internal registers ProdHi and ProdLo, respectively.
 +
 +
=== Flags ===
 +
This microop does not currently set any flags. It will be able to in the future.
  
 
== Mulel ==
 
== Mulel ==

Revision as of 16:11, 27 September 2007

Register Ops

Add

add: Dest = Src1 + Src2

Adds the contents of the Src1 and Src2 registers and puts the result in the Dest register.

addi: Dest = Src1 + Imm

Adds the contents of the Src1 register and the immediate Imm and puts the result in the Dest register.

Flags

This microop optionally sets the CF, ECF, ZF, EZF, PF, AF, SF, and OF flags.

CF and ECF The carry out of the most significant bit.
ZF and EZF Whether the result was zero.
PF The parity of the result.
AF The carry from the 4th to 5th bit positions.
SF The sign of the result.
OF Whether there was an overflow.

Adc

adc: Dest = Src1 + Src2 + CF

Adds the contents of the Src1 and Src2 registers and the carry flag and puts the result in the Dest register.

adci: Dest = Src1 + Imm + CF

Adds the contents of the Src1 register, the immediate Imm, and the carry flag and puts the result in the Dest register.

Flags

This microop optionally sets the CF, ECF, ZF, EZF, PF, AF, SF, and OF flags.

CF and ECF The carry out of the most significant bit.
ZF and EZF Whether the result was zero.
PF The parity of the result.
AF The carry from the 4th to 5th bit positions.
SF The sign of the result.
OF Whether there was an overflow.

Sub

sub: Dest = Src1 - Src2

Subtracts the contents of the Src2 register from the Src1 register and puts the result in the Dest register.

subi: Dest = Src1 - Imm

Subtracts the contents of the immediate Imm from the Src1 register and puts the result in the Dest register.

Flags

This microop optionally sets the CF, ECF, ZF, EZF, PF, AF, SF, and OF flags.

CF and ECF The barrow into of the most significant bit.
ZF and EZF Whether the result was zero.
PF The parity of the result.
AF The barrow from the 5th to 4th bit positions.
SF The sign of the result.
OF Whether there was an overflow.

Sbb

sbb: Dest = Src1 - Src2 - CF

Subtracts the contents of the Src2 register and the carry flag from the Src1 register and puts the result in the Dest register.

sbbi: Dest = Src1 - Imm - CF

Subtracts the immediate Imm and the carry flag from the Src1 register and puts the result in the Dest register.

Flags

This microop optionally sets the CF, ECF, ZF, EZF, PF, AF, SF, and OF flags.

CF and ECF The barrow into of the most significant bit.
ZF and EZF Whether the result was zero.
PF The parity of the result.
AF The barrow from the 5th to 4th bit positions.
SF The sign of the result.
OF Whether there was an overflow.

Mul1s

mul1s: ProdHi:ProdLo = Src1 * Src2

Multiplies the unsigned contents of the Src1 and Src2 registers and puts the high and low portions of the product into the internal registers ProdHi and ProdLo, respectively.

mul1si: ProdHi:ProdLo = Src1 * Imm

Multiplies the unsigned contents of the Src1 register and the immediate Imm and puts the high and low portions of the product into the internal registers ProdHi and ProdLo, respectively.

Flags

This microop does not currently set any flags. It will be able to in the future.

Mul1u

mul1u: ProdHi:ProdLo = Src1 * Src2

Multiplies the unsigned contents of the Src1 and Src2 registers and puts the high and low portions of the product into the internal registers ProdHi and ProdLo, respectively.

mul1ui: ProdHi:ProdLo = Src1 * Imm

Multiplies the unsigned contents of the Src1 register and the immediate Imm and puts the high and low portions of the product into the internal registers ProdHi and ProdLo, respectively.

Flags

This microop does not currently set any flags. It will be able to in the future.

Mulel

Muleh

Div1

Div2

Divq

Divr

Or

And

Xor

Sll

Srl

Sra

Ror

Rcr

Rol

Rcl

Mov

Sext

Zext

Ruflag

Ruflags

Wruflags

Br

Rdip

Wrip

Load/Store Ops

Load immediate Op

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