Difference between revisions of "Google Summer of Code"

Revision as of 03:11, 11 March 2008

1. ARM ISA
   • Not realistic
2. Real F/S In-order core
   • Kevin has one that works to some degree in SE, it doesn't have functional units yet, but it does have variable latency stages and such
   • Korey has one he did at MIPS, I don't know about it's features, but it's SE only as well
3. Fast Simple Core
   • This largely disregards all the compartmentalization we've done. It touches a lot of things, so the time to start being productive would be high
4. Performance stuff
   • The original thought. Profiling, fixing, etc
5. Instruction page decode cache
   • Kinda goes along with the fast simple core, but i think it's a more manageable task. Clearing it is as simple as looking for flush instructions in sparc and the correct pal trap in alpha
6. Directory Protocol
   • Not realistic
7. SMT
   • Fix O3 bugs/ Fix ROB Units
   • It's a huge pile of code to understand before you get anywhere if they get that far
8. Parallelize M5
   • If only, but not realistic
9. Are there any other benchmarks we want?
   • That they could possible make work?
10. Devices?
    • Validate the DRAM model?
11. Sampling/checkpointing/restarting
    • Testing, fixing, etc... Not exactly exciting work
12. Write a PLI interface to connect Verilog CPUs to the memory system. It would would be pretty cool for 470 students to try to boot Linux. It would be best if they could also write hooks to get syscall emulation since that's probably much more sane.
13. Sampling/fast-forwarding techniques (making sure ours works, maybe adding in some new ones)
14. Different cache models (different replacement policies, etc.; would allow them to do some research into it, maybe get some work done for Lisa)
15. Different prefetcher models (expand on what Ron has, also can do some research into it)
16. Flash memory device model? (seems popular nowadays)