Documentation

Getting Started

1. Introduction - A quick introduction to gem5.
2. Source Code - Information about the source code itself.
3. External Dependencies - Things you'll need that aren't part of gem5 itself.
4. Build System - How to run or modify gem5's build system.

Running M5

1. Running M5 - Starting a simulation from the command line.
2. Regression Tests - Running the regression tests.
3. SimObjects - What SimObjects are and how they work.
4. Configuration Scripts - This and the next section need to be merged.
5. Simulation Scripts Explained
6. Summary gem5 Capabilities
7. Architecture Support -- What architectures are supported by gem5 and what features of them are implemented

Workloads

1. Compiling - How to compile workloads to run within gem5.
2. Multiprogrammed workloads - Multiprogrammed workloads in SE mode.
3. Multithreaded workloads - Multithreaded workloads in SE mode.
4. Benchmark suites
   1. SPEC - SPEC benchmarks in SE mode.
   2. SPLASH - SPLASH benchmarks (SE or FS mode?)
   3. PARSEC - PARSEC benchmarks in FS mode.
5. Disk images - Setting up a disk image.
6. Linux kernel - Preparing a Linux kernel for use in gem5.
7. m5ops - How to talk to the simulator from within a simulated workload.

Development

1. Functional Testers
   1. directedtest
   2. memtest
   3. networktest
   4. rubytest
2. Debugging
3. Coding Style
4. Tools and Contributing
5. Source Code Documentation
6. Commit Access

Infrastructure

1. Events
2. Statistics
3. Utility Code
4. Serialization

Memory System

1. General Memory System - Shared infrastructure between the Classic and Ruby models
2. Classic Memory System - Description of our easily configurable, bus-based memory system
3. Ruby - Description of our detailed and flexible memory system. Lots of information here.

Full System

1. Devices
   1. IDE Devices
   2. NIC Devices
   3. Timers
   4. UARTs and serial terminals
2. Disks and Disk Images
3. Interrupts

Syscall Emulation

1. SE Mode

Instruction Execution

1. Execution Basics
2. Architectural State
3. Address Translation

CPU Models

1. Simple CPU Model
2. Out-of-Order CPU Model
3. In Order CPU Model
4. Adding a New CPU Model

ISA Implementations

1. Multiple ISA Support
2. ISA Parser
3. Alpha Implementation
4. ARM Implementation
5. MIPS Implementation
6. Power Implementation
7. SPARC Implementation
8. X86 Implementation
9. Defining ISAs